Advanced signal processing tasks have become increasingly demanding as technology has advanced. Much of this added demand is based on required and/or desired speeds at which the signal processing is intended to occur. Implementing these signal processing tasks becomes, therefore, more complex as well.
Feedforward processing, rather than feedback processing, can reduce the complexity of signal processing tasks and increase throughput in certain signal processing architectures. This is particularly advantageous in signal processing architectures that include, for example, filters with linear phase or constant group delay requirements. Non-recursive signal processing tasks are a class of such signal processing tasks that are accomplished without any feedback-based signal processing. The input/output equations that characterize non-recursive signal processing approaches represent feed-forward relationships between an output signal and an input signal.
Finite impulse response (FIR) filters represent a class of filters most commonly implemented with digital circuits. FIR filters have one or more feedforward paths, but no feedback loops. FIR filters possess other desirable properties such as achieving linear-phase frequency response. FIR filters can employ either digital or analog sampled data techniques. FIR filters differ from infinite impulse response (IIR) filters, which feedback filter states to generate a filtered output.
Sampled data techniques are used to implement signal-processing tasks in a variety of signal processing applications. In these applications, a sampler can sample a signal at discrete and regular time intervals. The signal samples are then processed by any of several techniques, the most common of which are digital signal processing (DSP) techniques. DSP techniques convert analog signal samples into corresponding digital representations and perform arithmetic operations on the digital representations via processing elements such as registers, adders/subtractors and multipliers.
Various FIR implementation schemes are discussed in “A Switched-Capacitor Realization of Multiple FIR Filters on a Single Chip,” IEEE Journal of Solid-State Circuits, Vol. 23, No. 2, April 1988. This reference describes differing implementations of FIR filters, cataloging their attendant advantages and disadvantages.
A drawback of many DSP techniques is required conversion of signal samples into a corresponding digital representation using analog-to-digital (A/D) conversion. A/D conversion can severely limit processing speeds. Also, A/D conversion may inaccurately resolve or quantize the signal to a small numbers of bits. Operations performed on resolution-limited data tend to yield outputs with poor signal-to-noise (SNR) ratios. These outputs, when further processed through different filters, yield output signals that have poor reproduced integrity with respect to the input signals. This poor integrity can be a result of limited resolution processing operations resulting from high-speed signal processing constraints. As such, as speeds increase, resolution coincidentally decreases.
Additionally, if analog output signals are required, digital representations of output samples computed by DSP-based signal processing systems must be re-converted into an equivalent analog signal via digital-to-analog (D/A) conversion techniques. Requiring D/A conversion components adds complexity, tends to increase power consumption and cost, further contributes to signal distortion, and results in further limitation to system signal-processing speed.
A variety of signal processing implementation options that do not convert analog samples into equivalent digital representations exist. These implementation techniques process analog-valued samples to varying accuracies at increasingly high speeds. Two of these signal-processing implementations as described in the above-cited reference are Charge Coupled Device (CCD) based implementations, and analog Complementary Metal Oxide Semiconductor (CMOS) Switched-Capacitor (SC) based sampled-data implementations.
As indicated in the above-cited reference, signal processing implementations that are based on CCD technology are less attractive than SC implementations in that they tend to require non-standard processing technologies that often make them expensive and somewhat difficult to implement. CCD technology based solutions also tend to suffer by limiting dynamic range due to difficulty in, among other shortfalls, realizing output charge-to-voltage conversion amplifier.
Implementations based on SC devices have gained wider acceptance in achieving even higher speeds than those that are achievable with other DSP-based sampled data techniques. SC device based implementations tend to have larger dynamic ranges as compared to those of CCD technology based implementations. CMOS implementations offer very mature, cost effective technology solutions, which can enable further improvements in signal processing speeds and/or operating rates. Speed improvements made possible by CMOS technology based solutions can also be realized through reductions in physical dimensions of transistors and reductions in line widths for inter-circuit element connections. CMOS based sampled data techniques are also advantageous because they require no A/D or D/A conversion, thereby simplifying circuit design. Resulting semiconductor fabrication steps for these circuits also tend to be much less specialized than those conventionally required for CCD based implementations.
Sampled-data, non-recursive signal processing tasks find wide utility for applications in spectral analysis, radar signal processing, image compression, and spread spectrum communications. Some of these applications benefit from using Finite Impulse Response (FIR) filters for which the duration of the filter impulse response is are based on the above-mentioned advantages. In contrast to non-recursive or IIR filters, FIR filters can be designed to have a linear phase response, i.e., for each given frequency, the phase of the filter output, relative to the filter input at that frequency, is proportional to frequency. Linear phase filters include constant group delays and symmetric impulse responses. Linear phase characteristics are desirable in applications that are particularly sensitive to phase distortion. For example, a linear phase characteristics are desirable for applications that use Discrete Fourier Transforms (DFT) or the Discrete Cosine Transforms (DCT).
Switched-capacitor (SC) filter technology based implementations of the FIR filters can operate at a given sampling frequency, Fs, and over a given sampling period, where the sampling period is a reciprocal of the given sampling frequency. To recap, switched-capacitor (SC) FIR filters tend to: (1) be faster, (2) offer higher dynamic range, (3) be more power-efficient, and (4) be more compact, particularly in comparison to other sampled data techniques. For example, at the very high speed end of the range, such as for applications at Giga-Samples per Second (GSPS), SC based solutions can realize these processing speeds with better output signal integrity, as measured by one or more characteristics such as signal to noise ratio, dynamic range, or signal and noise cross spectral density, compared to other Digital Signal Processing (DSP) based solutions. SC based solutions do not require analog-to-digital (A/D) or digital-to-analog converters; thereby eliminating quantization noise and reducing cost. A/D converters used for very high-speed signal processing applications, for example, can be very expensive even at a precision of just a few bits (2 or 3 bits/sample). The SC based solutions have smaller footprint and can be implemented using mature, low power and high speed CMOS technology.
An additional advantage as compared to CCD-based implementation is that the SC based solution is easier to integrate on an Application Specific Integrated Circuit (ASIC). Unlike CCD technology solutions, SC based solutions do not require expensive non-standard semiconductor processing steps that tend to be incompatible with ASICs. However, currently available filter implementations based on SC technologies use designs and methods that include a more complex mix and number of circuit elements typically result in increased semiconductor die size, power consumption, and cost, and can thus decrease operating frequency or speed. For example, the size and complexity of analog multiplexers needed in some SC filter designs can increase rapidly as a number of filter coefficients increases.